1. Field of the Disclosure
The present disclosure relates to processes, and more particularly to processes of forming electronic devices including doped semiconductor layers.
2. Description of the Related Art
Electronic devices can include phosphorus-doped semiconductor layers. Some of the earliest semiconductor devices include pnp bipolar transistors. After forming a heavily-doped p-type collector region within a monocrystalline silicon substrate, an n-type silicon layer can be epitaxially grown from the substrate. The n-type silicon layer can be in-situ doped using phosphine when the dopant is phosphorus. The dopant concentration of the n-type silicon layer is much lower than the p-type dopant concentration within the collector region. For example, the n-type silicon layer may have 1E15 to 1E17 phosphorus atoms/cm3.
In the 1970s and early 1980s, polycrystalline and amorphous silicon gate processes replaced the older aluminum-gate processes when forming metal-oxide-semiconductor transistors. The polysilicon or amorphous silicon gates were typically n-type doped and could form buried contacts with the substrate. Before high-current ion implanters were used in commercial production, the polysilicon or amorphous silicon gates were formed by depositing an undoped silicon deposition and furnace doping or by depositing an in-situ doped silicon layer. Regarding the former, after depositing an undoped silicon layer (typically at a temperature in a range of 600 to 650° C. for polysilicon or 560° C. for amorphous silicon), the workpiece, including the undoped silicon layer, would be exposed to a phosphorus-containing gas, such as PH3/O2 or POCl3, at a temperature of 800 to 900° C., and then a dopant drive would be performed at a temperature of 1000 to 1150° C. Alternatively, a heavily doped phosphosilicate glass would be grown or deposited onto the undoped silicon layer, and then a dopant drive would be performed at a temperature of 1000 to 1150° C. The oxide (whether from the POCl3 reaction or the heavily doped phosphosilicate glass) would be stripped from the silicon layer and processing would be continued. Regarding the in-situ doping, the doping would be performed using phosphine at the deposition temperature. For both, the phosphorus concentration would not exceed the solid solubility limit of silicon at the silicon deposition temperature. Regardless of which process was used, the workpieces with the phosphorus-doped silicon layer would be cleaned, and a nitride layer would be deposited before performing a gate electrode etch.
High-current ion implanters have replaced many of the furnace doping operations. Many high-current implants allow doped regions and layers to be formed that typically do not exceed 5E20 phosphorus atoms/cm3. Unlike furnace doping, the highest concentration immediately after ion implantation is not at an uppermost surface of the silicon layer or substrate, but at a projected range, which is spaced apart from that uppermost surface.
Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the invention.